Integrated radio front-end module with embedded circuit elements

ABSTRACT

A highly integrated radio front-end module. In one embodiment a semiconductor substrate is processed with various circuit components in the substrate, as well as interconnections for the various circuit components, embedding the circuit components into the substrate. One or more circuit components may be further connected with a separate integrated circuit, the separate integrated circuit bonded to the semiconductor substrate via contact points processed into the substrate.

RELATED APPLICATION

This application is a continuation-in-part of application Ser. No.10/816,264, filed Mar. 31, 2004, and claims the benefit of thatApplication.

FIELD

Embodiments of the invention relate to silicon integrated circuits, andparticularly to a radio front-end module with circuit componentsembedded on a substrate.

BACKGROUND

Many circuits currently use discrete components and/or integratedcircuits (ICs) that may be produced with different types of processingand materials. Some of the different types of processing and materialsmay include complimentary-metal-oxide-semiconductor (CMOS),gallium-arsenide (GaAs), lithium tantalate (LiTaO₃), andsilicon-germanium (SiGe). Traditionally many of these devices have beenassembled and interconnected on ceramic or organic interconnect devicesthat have traces to interconnect the various ICs and/or passives. Theresulting interconnected circuit is then packaged as a single component.

FIG. 1 is a known example of interconnecting various ICs with aninterconnect device. Passive substrate 110 represents traditionalinterconnect devices, typically organic material (e.g., FR4) orceramics. Passive substrate 110 is passive because it has no circuitfunctionality except to assemble and interconnect the various circuitcomponents. All circuit functionality, such as processing, manipulating,affecting, etc., signals in the circuit is performed in the variouscircuit elements assembled on top of passive substrate 110. Thus, theICs, switches, and passives shown in FIG. 1 are the functional circuitelements. The main advantage to using passive substrate 110 is that itis relatively inexpensive, generally only requiring that contact padsand interconnect traces be manufactured onto passive substrate 110. Thecircuit components are then bonded or soldered to passive substrate 110.Thus, various ICs of potentially many disparate processing technologiesand/or procedures can all be packaged as a single component.

Examples of various circuit elements include RLC 120, which representsdiscrete passive components such as resistors, inductors, andcapacitors, and filters created with such passive components. Thesecomponents are used to passively process signals occurring in system100. ICs of differing processing technologies and materials are alsoshown as CMOS 130, SiGe 140, LiTaO₃ 150, and switch 160.

CMOS 130 represents ICs that are made with complimentary metal (or otherconductor) oxide semiconductor (e.g., silicon) processing. SiGe 140represents ICs that are manufactured with silicon germanium processing.Because of the differences in processing of these two technologies,processing of circuits using these different technologies occurs ondifferent substrates and interconnecting occurs on an interconnectdevice such as passive substrate 110. The use of different types ofcircuits made with the different technologies is assumed to be wellunderstood in the art, and consequently will not be discussed herein.Note that the interconnecting of ICs 130, 140, 150, and 160 may beperformed by flip-chipping the IC and bonding to bumps, or by the use ofwire bonds, as shown with SiGe 140. Additionally, the various ICs showncould be bare die rather than packaged.

LiTaO₃ 150 represents devices processed on a lithium tantalitesubstrate, which is a boutique processing technology that istraditionally used with surface acoustic wave (SAW) filters. Switch 160is shown as one traditional element that is processed using GaAs toprovide fast switching, for example, switches in radio frequency (RF)devices.

Input/Outputs 170 are used in packaging system 100. Input/Outputs 170pads or bumps use vias through passive substrate 10 to provideinterconnection to the circuitry of system 100 to the packaging ofsystem 100. The interconnection to the packaging may be through wirebonding or metal traces connecting to the packaging pins.

Despite the inexpensive interconnect provided by passive substrate 10,there may be undesired expenses in the processing of the various ICsshown in FIG. 1. For example, many ICs use boutique processingtechnologies such at LiTaO₃ or GaAs that can be significantly morecostly than silicon-based processing. However, use of these processeshas been necessary to achieve the desired performance. Integrating thesecomponents made with boutique processes with strictly silicon-basedcomponents has proven costly.

Another example of the expense in traditional practice is that manycircuits require the use of resistors, capacitors, inductors, andpassive filters. These components may be integrated directly on the IC,or they may be discrete components, such as LTCC (low temperatureco-fired ceramic) devices, that require bonding to passive substrate 10.However, there are costs associated with using discrete passivecomponents, as well as directly integrating passives on modern ICsmanufactured with high precision (e.g., 90 nm) processing. The higherprecision processing is used to scale ICs with active devices such astransistors, which are typically scaleable. The increased cost ofmanufacturing may be justified by the increases in performance of theresulting devices. However, higher precision processing does little ornothing to increase performance of components such as the passives thatdo not scale. Also, for devices such as voltage regulation circuits andcertain sensors, non-high-end processing is also perfectly viable forproducing circuit elements of acceptable performance, making the use ofhigh-end processing for such devices wasteful. Thus, integrating thesedevices on ICs consisting of scaleable active device with modernprocessing techniques is wasteful of processing costs as well asvaluable die real estate.

BRIEF DESCRIPTION OF THE DRAWINGS

The description of embodiments of the invention includes variousillustrations by way of example, and not by way of limitation in thefigures and accompanying drawings, in which like reference numeralsrefer to similar elements.

FIG. 1 is a known example of interconnecting various ICs with aninterconnect device.

FIG. 2 is a block diagram of a silicon substrate interconnectingintegrated electrical circuit components and interconnections inaccordance with one embodiment of the invention.

FIG. 3 is a block diagram of interconnecting ICs with a siliconbackplane having components processed on the silicon backplane inaccordance with one embodiment of the invention.

FIG. 4 is a block diagram of externally interconnecting a cappedintegrated circuit in accordance with one embodiment of the invention.

FIG. 5 is a block diagram of circuit elements on a silicon interconnectbackplane in accordance with one embodiment of the invention.

FIG. 6 is a block diagram of circuit elements of a radio frequency (RF)system element having an integrated radio front-end module in accordancewith one embodiment of the invention.

FIG. 7 is a block diagram of circuit elements of a wirelesscommunication system including a front-end circuit system-on-a-chip inaccordance with one embodiment of the invention.

DETAILED DESCRIPTION

Methods and apparatuses are described for using a silicon backplane tointegrate and interconnect electronic components (e.g., passive, switch,filter, analog transistor, power transistor, etc.) that cannot be builton highly scalable very large scale integration (VLSI) processes in acost effective manner. With a silicon backplane device, functionalcircuit elements may be monolithically integrated on the interconnectdevice with the interconnections. In one embodiment a silicon backplanehas components and interconnects embedded in the substrate with contactsto interconnect to other ICs.

In one embodiment all components integrated directly into the silicon ofa silicon backplane are manufactured with monolithic processing.Monolithic is to be understood as being part of, or consistent with, thesingle crystalline structure of the silicon backplane. Monolithic may beunderstood as processing where the resulting integratedcomponents/interconnects are part of the silicon wafer. Another way tounderstand monolithic is that the devices integrated with monolithicprocessing are embedded in the silicon substrate (in the wafer). Thismay be, for example, in contrast to modern VLSI CMOS processes that havemany layers, such as interconnect layers on top of integrated devices.Thus, monolithic may or may not be understood as including polysilicongrown off the silicon crystal of the silicon substrate. This wouldgenerally not include devices in a silicon substrate whose processingresults in a device with layers (e.g., CMOS). Monolithic is meant toinclude the use of conductors, such as traces and contact pads. It mayalso include some active devices, for example, transistors, as discussedbelow.

FIG. 2 is a block diagram of a silicon substrate interconnectingintegrated electrical circuit components and interconnections inaccordance with one embodiment of the invention. Semiconductor substrate210 includes a semiconductor substrate in which circuit components maybe integrated or embedded, with semiconductor processing. The use ofsilicon as a semiconductor substrate is common. Semiconductor substrate210 includes external interconnection 220, internal interconnection 230,passive 240, and contacts 250.

External interconnection 220 includes traces, wells, etc., used bysystem 200 to interconnect to packaging (e.g., pins, leads), othersubstrates, etc. For example, system 200 may be interconnected withpower supply 270 to provide power to the circuits. Power supply 270 maybe from a regulated voltage source, battery (a power storage cell), etc.Power supply 270 is typically a direct current (DC) power source.Internal interconnections 230 selectively interconnect the componentsembedded in semiconductor substrate 210 with each other and/or with ICs260, which represents one or more integrated circuits that may beconnected (e.g., wire bonded, flip-chip bonded) to semiconductorsubstrate 210.

In one embodiment passive 240 represents passive component(s)monolithically embedded in semiconductor substrate 210 with the sameprocessing used to produce interconnections 220 and/or 230. Passive 240provides electrical functionality in the circuit of system 200. Thus,passive 240 may modify, filter, or otherwise process signals of system200.

Contacts 250 represents contact (bonding) pads used to interconnect ICs260 to internal interconnections 230, which in turn interconnects ICs260 to other elements of system 200. Contacts 250 may be areas of metaland/or high conductive material used to provide an area of relativelylarger size to connect, e.g., wire bonds, bumps, to the interconnectionlines/traces of internal interconnections 230. In one embodiment system200 is enclosed with an enclosing device 280. The enclosing device willbe discussed in more detail below.

FIG. 3 is a block diagram of interconnecting ICs with a siliconbackplane having components processed on the silicon backplane inaccordance with one embodiment of the invention. Silicon backplane 310is a piece of silicon that may be processed according to siliconprocessing techniques. Silicon backplane 310 is processed tointerconnect various circuit elements in a single system on an IC.System 300 may include various ICs, including CMOS 350, SiGe 360, andCMOS 370. These devices represent any type of IC that may be integratedinto system 300 with other ICs in the same packaging. In one embodimentthe components of system 300 include silicon-based devices, thusavoiding the expense of boutique processing technologies such as LiTaO₃and GaAs. However, non silicon-based IC devices may also be included insystem 300 through integration onto silicon backplane 310. These devicesmay be electrically attached to contact pads on silicon backplane 310 bybumps or wire bonding. These devices will be selectively interconnectedto each other, and to external contact pads according to the design ofthe system of which they are a part.

The footprint of interconnect lines or traces and contact (bonding)pads, bumps, etc. do not require high precision lithographic processingtechnology because they generally derive no benefit from scaling.Additionally, note that certain common circuit elements, such as passivecomponents (e.g., resistors, capacitors) do not scale, and may notrequire a high precision lithographic processing technology to beproduced. Thus, all such aspects of a silicon interconnect device may beintegrated into the silicon interconnect with the use of non high-end(e.g., 1 μm, 0.5 μm minimum feature size) processing techniques. Notethat for certain signaling requirements, traces of a larger size may infact be desirable for an interconnect device. On such devices, theprecision level of high end, state-of-the-art lithography (e.g., featuresize of 90 nm, 65 nm) is not needed; a lower precision processingtechnology may be sufficient. Additionally, the interconnects andpassives can be embedded together in a silicon substrate with many fewerprocessing steps that the numerous steps generally used in high endprocessing to produce multiple layers of circuit material (e.g.,interconnects) on top of the structures actually embedded in theoriginal substrate.

Because silicon backplane 310 includes a semiconductor substrate, in oneembodiment it can be processed to have integrated devices, makingsilicon backplane 310 more than simply a passive interconnect device.Although it provides interconnection for system 300, silicon backplane310 is also processed with components that provide electrical circuitfunctionality to system 300. For example, silicon backplane 310 mayinclude switch 320, RLC passives 330, and bulk acoustic wave (BAW)filter 340. More or fewer components may be included in siliconbackplane 310.

Note that as the interconnection aspects of silicon backplane 310 may beprocessed on silicon backplane 310 using non state-of-the-artlithographic processing, the functional elements processed on siliconbackplane 310 may also be processed with such lesser-precisionlithographic processing technologies. One advantage gained by using thesame processing steps is the reduced cost in integrating the functionalelements and interconnections with the same processing steps. Althoughthe lithographic (x-y dimensions) technologies involved may be of lesserthan state-of-the-art, processing in the vertical direction (zdimension; e.g., thin film deposition, film thickness control) may bestate-of-the-art. In one embodiment higher precision processing may beperformed on part or all of the material of silicon backplane 310 tomanufacture the integrated circuit elements.

Note that the cost of a silicon substrate used as an interconnect deviceis initially of higher cost than a corresponding organic or ceramicinterconnect substrate. The materials of traditional interconnectsubstrates are cheaper than silicon, and the processing to produce theinterconnection is more expensive in silicon, even when using lower-endlithographic precision processing techniques. However, the cost of asilicon substrate interconnect becomes justifiable when functionalcircuit elements may be manufactured in the silicon backplane, removingsome or all of the need for discrete passive components. Cost reductionmay also be achieved by having a substrate in which to processsilicon-based components as replacements for some ICs produced withboutique processing. By eliminating the need to place some or all highreal-estate passives on ICs manufactured with high-end processingtechnologies, or use discrete passive components that must be integratedonto a system, along with replacing ICs produced with expensive boutiquetechnologies, the overall system costs may actually be lower. With theseother costs reduced, the additional cost of the silicon backplane overthe passive substrates is more than offset by the savings.

For example, one of the savings potentially achieved by the use ofsilicon backplane includes the fact that the level of lithographicprecision for the embedded devices may be accomplished on equipment thatmay not be state-of-the-art. Thus, previous generation equipment couldbe used to produce circuit elements that may otherwise be lessefficiently produced on high-end equipment that may be better used toproduce highly scalable circuit elements. The production of a system ona single chip may be effectively accomplished by using nonstate-of-the-art lithographic equipment to produce silicon backplane 310with its embedded circuit elements and interconnections, andinterconnect scalable ICs produced with state-of-the-art equipment.

In one embodiment switch 320 includes a micro electromechanical (MEMS)switch processed on silicon backplane 310 using non high-endlithographic processing. Low insertion loss MEMS switching is known forswitching, e.g., between channels of an RF module. RLC passives 330include discrete elements as well as RLC passive filters for processinginput signals. BAW 340 is a film bulk acoustic resonator, which is asilicon-based equivalent of a SAW filter used as an alternative toLiTaO₃ SAW filters. SAW filters cannot be monolithically integrated intosilicon because they are made with LiTaO₃; therefore, these and othercomponents built with boutique processing technologies will remaindiscrete components, instead of being able to be integrated on siliconbackplane 310.

The use of silicon backplane 310 allows for the design of system 300with state-of-the-art processing technologies to produce ICs that havescaleable circuit components, while allowing offloading of some circuitfunctions to functional circuit components integrated into siliconbackplane 310 that may not have such exacting requirements formanufacturing.

Because MEMS devices are generally hermetically sealed, in an embodimentwhere MEMS device(s) are used, system 300 is capped with lid 380. Lid380 may be, for example, a silicon, or silicon-based structure that canbe affixed to the material of silicon backplane 310.

FIG. 4 is a block diagram of externally interconnecting a cappedintegrated circuit in accordance with one embodiment of the invention.System 400 is similar to that discussed above in FIG. 3. In oneembodiment silicon substrate 410 includes MEMS 430 and passive 440integrated directly on silicon substrate 410. MEMS 430 and passive 440are merely examples of functional circuit elements that may be embeddedon silicon substrate 410, and are not meant to be restrictive orexclusive of circuit elements that may be embedded in silicon substrate410.

System 400 also includes exemplary ICs 460 and 470. IC 460 is shownbonded with bumps, and IC 470 is shown bonded with wire bonds. It is tobe understood that more or fewer ICs may be included in system 400, andthe various ICs may be bonded with bumps, wire bond, or other methods.Interconnections 450 represent the selective internal connections amongthe devices of system 400. For example, IC 460 may be interconnected toMEMS 430, while IC 470 may not be, etc. Interconnections 450 may alsoinclude traces/lines to interconnect IC 460 to IC 470. In one embodimentit will be advantageous for system 400 to have cap 480 over thecircuitry.

System 400, once integrated with all of its components, is packaged asan IC in accordance with embodiments of the invention. An IC willtypically have electrical connectivity points such as pins/leads oninline or quad packages, or balls on a ball-grid array (BGA) package. Toconnect system 400 to its packaging, system 400 is provided withexternal interconnection mechanism(s). Through these interconnectionssystem 400 is able to interface with other ICs, other circuitry, powersupplies, etc. In one embodiment silicon substrate 410 is processed withexternal interconnection 420. If system 400 includes cap 480, externalinterconnection 420 may extend from the internal region of system 400that is capped to outside the cap. External interconnection 420 is thenbonded to the intended packaging of system 400 via, e.g., wire bonds421. The use of wire bonds to connect an integrated circuit to itspackaging is known.

In one embodiment system 400 includes cap 480, and vias 422 drilled oretched through cap 480 to external interconnection 420. Externalinterconnection 420 is manufactured directly on silicon substrate 410 toprovide external connectivity, as with the other interconnectiontechniques described above. Vias 422 may be, e.g., insulated and thenfilled or coated with metal and/or have a wire bond used to connect tointerconnection 450. It is again to be understood that theinterconnections described here may be used alone or in combination, andthe description herein is not intended to be limiting regarding a mannerto interconnect system 400 to an external connection point.

In one embodiment system 400 is manufactured with silicon vias 490through silicon substrate 410 to contact pads for the externalinterconnections. Vias 490 are typically drilled or etched throughsubstrate 410, insulated, and filled or coated with metal to provideelectrical connectivity between the contact pads and, for example,conductive traces to the pins, pads, or balls of the packaging.

FIG. 5 is a block diagram of circuit elements on a silicon interconnectbackplane in accordance with one embodiment of the invention. Theelements of FIG. 5 are not intended to be shown to scale. In oneembodiment the elements on silicon backplane 510 are part of a highlyintegrated radio module. Silicon backplane 510 includes high voltagechip (HVC) 520 and radio frequency IC (RFIC) 530. HVC 520 represents anintegrated circuit (whether separate IC(s) or embedded in siliconbackplane 510) that provides the high voltage necessary to actuate someMEMS devices. In a radio module, RFIC 530 may refer to multiple separatecomponents of the radio module, as with a multimode radio module.

Power amplifier (PA) 590 represents a final stage of an RF transmitterthat drives an antenna attached to the circuit on silicon backplane 510,in the embodiment where silicon backplane 510 includes an RF module. PA590 may be an IC bonded to silicon backplane 510. PAs are generally GaAsor SiGe devices and typically require passive matching and tuningnetworks for maximum efficiency and radiation by the antenna. Thesematching networks can be processed in silicon backplane 510 while one ormore die encompassing PA 590 are connected to silicon backplane 510 withflip chip or wire bonding. HVC 520, RFIC 530, and PA 590 are typicallyintegrated circuits that will be integrated together in a radio moduleon an interconnect device. These ICs may be integrated on siliconbackplane 510 with either wire bond or flip chip bonding. These elementsare meant only for purposes of illustration, and other ICs, includingICs unrelated to a radio module, may be included. In one embodimentthese ICs represent any kind of IC desirable for a system on a chipdesign.

In one embodiment silicon backplane 510 includes several componentsintegrated directly on silicon backplane 510 through silicon processing.For purposes of illustration, and not by way of limitation, siliconbackplane 510 may include balun 540, BAW 550, passives 560, and MEMSswitch 570. Balun 540 represents the many components that make up thecircuitry to transform an incoming single-ended radio signal to adifferential signal. Because the separate elements of balun 540 aretypically components that do not scale, they can be manufactured withthe lower-end processing with which silicon backplane 510 ismanufactured. This provides good reason to integrate them directly ontosilicon backplane 510 rather than as discrete components, or integratedon other ICs.

BAW 550 represents multiple SAW filters made of MEMS in the silicon ofsilicon backplane 510. In one embodiment BAW 550 is a film bulk acousticresonator (FBAR) filter. BAW 550 represents what may be multiplediscrete BAWs in the system. As with the BAW components, anothercomponent that can be processed directly into the silicon of siliconbackplane 510 is passives 560. Passives 560 represents discreteresistors, capacitors, and inductors that may be present in anintegrated circuit system, as well as LC filters that are typicallypresent in radio modules. In one embodiment the silicon of siliconbackplane 510 is high resistivity silicon. Thus, the passives may bemanufactured of low-impedance conductor on high-resistivity silicon,which provides better performance in passives 560. The propermanufacturing of the components will result in high-Q passives 560integrated directly into the silicon of silicon backplane 510.

As part of a radio module, or as part of another system integrated on asingle die, silicon backplane 510 may include other circuit components,including, but not limited to: MEMS 581, voltage regulation 582, andoptical 583. MEMS 581 is intended to represent a broad range of MEMSdevices that may be integrated on an IC. For example, MEMS 481 mayinclude: microfluidic devices with fluid channels, fluid storage(radiators), recombiners, microchannel cooler, and pumps; actuationdevices used to trigger events due to force, inclining of a device inwhich the system is found, etc.; and electrical and/or biological sensorcircuits.

Voltage regulation 582 includes regulation circuits to filter noise outof a voltage supply, or convert one voltage to another. Additionally,voltage regulation 582 may include circuits that regulate a non-steadyvoltage supply into a regulated voltage level.

In one embodiment silicon backplane 510 also includes optical devices583. This includes, but is not limited to, fiber alignment channels,laser components, etc. In one embodiment silicon backplane is made ofhigh-resistivity silicon, which looks like glass to infrared opticalsignals. Thus, the use of high-resistivity silicon may be advantageouswhen optical devices 583 are included in silicon backplane 510. In eachof optical 583 and voltage regulation 482, note that these circuits maylend themselves to have active devices, such transistors, diodes, etc.

Although active devices may typically be scaleable, in various circuits,such as embodiments of the circuits mentioned here, active componentsmay be manufactured with non high-end processing technologies because ofthe nature of the components needed. For example, voltage regulationwill typically require larger transistors that can be adequatelymanufactured for the purposes they serve in their respective circuitswith less precise lithography. Thus, even with what may be considered tobe scaleable components may be integrated on silicon backplane 510. Inone embodiment such active components may be monolithically processedwith the interconnections and other circuit elements integrated onsilicon backplane 510.

FIG. 6 is a block diagram of circuit elements of a radio frequency (RF)system element having an integrated radio front-end module in accordancewith one embodiment of the invention. RF system element 600 representsan element of a wireless communications system. Element 600 may be, forexample, a wireless access point, a cellular telephone, a laptopcomputer, a device connected to a wireless local area network (WLAN),etc. In one embodiment RF system element 600 includes an antenna 610. Inan alternate embodiment, RF system element 600 is connected with anantenna element 610. In either case, element 600 includes an antennainterface 601 to interconnect antenna 610 to other system components ofelement 600.

In one embodiment RF system element 600 includes a radio front-end 620.The radio front-end may be an integrated circuit as described above,with multiple circuit components integrated in a single package. Radiofront-end 620 is shown including radio frequency integrated circuit(RFIC) 621, passive elements/components 622, balun components 623,interface 624, and bulk acoustic wave filter (BAW) 625. It is to beunderstood that these are merely illustrative, and radio front-end 620may include more or fewer components than what is shown in FIG. 6.

RFIC 621 represents one or more processing elements to, for example,demodulate a received signal or a modulate a digital signal fortransmission. RFIC 621 may include circuits generated with CMOSprocessing technologies. In one embodiment, RFIC 621 is a silicon-basedintegrated circuit prepared for bonding/connecting to radio-front end620 by wirebond, flip-chip, etc. Passives 622 represent one or morecomponents integrated directly into the bulk silicon of a siliconbackplane/substrate of radio-front end 620 through silicon processing.Passives 620 may include one or more discrete resistors, capacitors,and/or inductors that may be present in an integrated circuit system, aswell as LC filters that may be present in a radio front-end. Whenintegrated onto a high resistivity silicon, the passives may bemanufactured of low-impedance conductor on high-resistivity silicon fora high Q in these components. Balun 623 represents the components thatmake up the circuitry to transform an incoming single-ended radio signalto a differential signal. In one embodiment BAW 550 may represent a SAWfilter constructed of MEMS in the bulk silicon of an SoC including radiofront-end 620. In one embodiment BAW 620 is a film bulk acousticresonator (FBAR) filter. The components described may be integrateddirectly onto a common semiconductor substrate, as is described above.

In one embodiment radio front-end 620 is interconnected with one or moreof processor 630, memory 640, and/or filter/amp 650. Processor 630represents one or more processors, for example, a signal processor, suchas a digital signal processor (DSP) for processing signals transmitterfrom/received by radio front end 620. In one embodiment processor 630may include functions other than those directly associated withprocessing of signals, for example, providing a user interface for RFsystem element 600. A user interface may include a screen display (e.g.,a liquid crystal display), a light emitting diode (LED), an audio ortactile interface, etc. In one embodiment, processing relating tomodulating/demodulating a signal, providing analog to digital (or viceversa), decoding/encoding a signal, etc., is accomplished on RFIC 621.In an alternate embodiment one or more of these functions may beaccomplished in conjunction with processor 630.

In one embodiment RF system element 600 includes one or more memoryelements 640, e.g., buffers, system memory, cache, random access memory(RAM) synchronous dynamic RAM (SDRAM), Flash, etc. Memory 640 mayprovide storage for data signals. RF system element 600 may also includefilter/amp 650, which represents one or more filters and/or amplifiersthat may be included in RF system element 600 to provide signal groomingand/or scaling of a signal in RF system element 600. In one embodimentfilter/amp 650 interfaces radio front-end 620 with processor 630.

FIG. 7 is a block diagram of circuit elements of a wirelesscommunication system including a front-end circuit system-on-a-chip inaccordance with one embodiment of the invention. In one embodimentsystem 700 represents a receive path for signals received on antennaelement 710. In another embodiment system 700 represents a transmit pathfor signals to be transmitter over antenna 710. Antenna path 720represents one or more signal lines or signal paths for atransmitted/received signal. In one embodiment path 720 may includepre-filters and/or matching components to interface antenna 710 tofront-end SoC 730.

Front-end SoC 730 represents a system-on-a-chip, or integrated,wireless/radio front-end. Front-end SoC 730 may perform multiplefunctions as is known in the art. In one embodiment, front-end SoC 730may include an all silicon-based integrated circuit handling thefront-end functions of system 700. For example, front-end SoC 730 mayinclude circuit components monolithically integrated into an SoCbackplane together with contacts/interconnections. In traditionalsystems only the interconnections between components are integrated onthe SoC backplane. Additionally, traditional front-end modules includeone or more components of a non-silicon, or boutique, technology. Byusing only silicon-based components, front-end SoC 730 may provide aless expensive solution than traditional systems with comparablefunctionality. By integrating components into the backplane of the SoC,cost may be further reduced by reducing the need for discrete passivecomponents, filters, etc.

In one embodiment system 700 includes filters/amps 740, which representone or more components to shape and/or scale a signal in system 700.This may be used, for example, to interface front-end SoC 730 withsignal processor 750. Note that in one embodiment thefunctions/components of filters/amps 740 may be included in front-endSoC 730, e.g., integrated into the backplane. This provides a compactsolution, allowing for a smaller-form wireless device (e.g., cell phone,wireless card, access point, etc.).

In one embodiment system 700 may include I/O 760, which represents inputand output interfaces/components that may be present in a wirelessdevice, e.g., a cell phone, a wireless handheld computing device, etc.The one or more components of I/O 760 may provide functionality in adevice for a user. For example, through I/O 760, a user of a deviceincluding system 700 may send and receive voice and/or data messages.I/O 760 may include a liquid crystal display (LCD), mechanical buttonsand/or switches, touchscreens, soft keys (e.g., icons, buttons), etc. Inone embodiment I/O 760 includes an audio interface component, forexample, a speaker, a piezo-electric element, a microphone circuit, etc.

I/O 760 may be directly connected with processor 750, or may beindirectly coupled with processor 750. In one embodiment processor 750may control/manage I/O 760, e.g., through direct commands to I/O 760,commands to a control circuit of I/O 760, over a communication bus, overdedicated signal lines, etc. In one embodiment signal processor 750represents multiple processors in system 700, for example, with aprocessor to control I/O 760 and a processor to perform digital signalprocessing on wireless signals received at antenna 710. If multipleprocessors are used in a system, one processor may operate as a centralprocessor with one or more processors in communication with the centralprocessor, and executing application specific functions.

Reference herein to “one embodiment” or “an embodiment” means that aparticular feature, structure or characteristic described in connectionwith the embodiment is included in at least one embodiment of thepresent invention. Thus, the appearance of phrases such as “in oneembodiment,” or “in another embodiment” describe various embodiments ofthe invention, and are not necessarily all referring to the sameembodiment. Besides the embodiments described herein, it will beappreciated that various modifications may be made to embodiments of theinvention without departing from their scope. Therefore, theillustrations and examples herein should be construed in anillustrative, and not a restrictive sense. The scope of the inventionshould be measured solely by reference to the claims that follow.

1. A radio frequency (RF) front-end module comprising: an interface toan antenna element; an interface to an RF signal filter; and asemiconductor substrate having a capacitive passive circuit elementmonolithically integrated into the substrate and a contact point forconnecting a separate integrated circuit (IC) to the substrate, thecapacitive circuit element and the IC forming a system-on-a-chip (SoC),the SoC coupled with the antenna element interface and the RF signalfilter interface.
 2. An RF front-end module according to claim 1,further comprising a resistive passive circuit element monolithicallyintegrated into the substrate on the SoC.
 3. An RF front-end moduleaccording to claim 1, further comprising a semiconductor bulk acousticwave filter monolithically integrated into the substrate on the SoC. 4.An RF front-end module according to claim 1, further comprising a baluncircuit monolithically integrated into the substrate on the SoC.
 5. AnRF front-end module according to claim 1, wherein the semiconductorsubstrate and the separate IC comprise silicon-based technologies.
 6. AnRF front-end module according to claim 5, wherein the front-end moduleincludes only silicon-based technologies.
 7. A wireless network elementcomprising: an antenna; a front-end module coupled with the antenna toreceive or transmit a signal from/to the antenna, the front-end modulehaving a front-end circuit chip with a silicon substrate with passivecircuit components and signal filter components monolithicallyintegrated onto the silicon substrate, and a processing circuit on aseparate substrate, the processing circuit bonded to the siliconsubstrate; and a processor coupled with the front-end module to receivea signal for processing from the front-end module if the front-endmodule receives a signal from the antenna, or transmit a signal to thefront-end module to modulate the signal for transmission from theantenna.
 8. A wireless network element according to claim 7, wherein thewireless network element comprises a cellular telephone.
 9. A wirelessnetwork element according to claim 7, wherein the wireless networkelement comprises a wireless access point.
 10. A wireless networkelement according to claim 7, wherein the wireless network elementcomprises a wireless network card.
 11. A wireless network elementaccording to claim 7, wherein the wireless network element comprises alaptop computer.
 12. A wireless network element according to claim 7,wherein the signal filter components comprise a film bulk acousticresonator filter.
 13. A radio front-end circuit comprising: a baluncircuit to interface a single-ended and a differential version of asignal; a tuning capacitor; and a silicon-based radio frequencyprocessing integrated circuit (RFIC); wherein the balun circuit, thetuning capacitor, and the RFIC are interconnected on a siliconbackplane, the silicon backplane having the interconnections processedinto the bulk silicon of the silicon backplane with a series ofprocessing steps, the silicon backplane further having contactsprocessed into the bulk silicon with the same series of processingsteps, the RFIC bonded to the silicon backplane via the contacts, andthe balun circuit and the tuning capacitor processed into the bulksilicon with the same series of processing steps.
 14. A radio front-endcircuit according to claim 13, further comprising an acoustic wavefilter interconnected with the RFIC in the silicon backplane, theacoustic wave filter processed into the bulk silicon with the sameseries of processing steps.
 15. A radio front-end circuit according toclaim 13, wherein the tuning capacitor includes micro electromechanicalsystem (MEMS) elements.
 16. A radio front-end circuit according to claim15, further comprising an integrated circuit including a high voltageinterface (HVIC) to drive the MEMS elements, the HVIC coupled with thetuning capacitor in the silicon backplane.
 17. A wireless handhelddevice comprising: an antenna; a transceiver coupled with the antennahaving a radio frequency front-end circuit with a passive circuitcomponent, a signal filter component, a balun circuit, interconnectlines, and bonding pads monolithically integrated in a bulk siliconsubstrate, the bonding pads to receive and interconnect an integratedcircuit chip, the transceiver to transmit and receive signals from aprocessor; and an input/output (I/O) interface coupled with theprocessor to provide access to a user to functions of the wirelesshandheld device.
 18. A wireless handheld device according to claim 17,wherein the processor comprises a central processor, the centralprocessor to manage the I/O interface and the transceiver.
 19. Awireless handheld device according to claim 17, wherein one or more ofthe signal filter component, the balun circuit, or the bonding padsincludes a micro electromechanical system (MEMS) component.
 20. Awireless handheld device according to claim 19, wherein the transceiverfurther comprises a high voltage interface circuit monolithicallyintegrated in the bulk silicon backplane to provide switching voltagesfor a MEMS component of the transceiver.